发明名称 Universal error-correction circuit with fault-tolerant nature, and decoder and triple modular redundancy circuit that apply it
摘要 A universal error-correction circuit with fault-tolerant nature includes an error-correction unit with fault-tolerant nature implemented by a logic gate, where digital input signals of the error-correction unit with fault-tolerant nature are separately I0, I1 . . . , I2k-1, and I2k, digital output signals of the error-correction unit with fault-tolerant nature are separately O0, O1, . . . , Ok-2, and Ok-1, and the digital input signals and the digital output signals belong to a set {0,1}, where k is a positive integer. The error-correction unit with fault-tolerant nature is configured to, when k=1, set O0=I0 if I0=I1, and O0=I2 otherwise; and when k>1, set Ok-1=I2k-1 if Ok-2=I2k-1, and Ok-1=I2k otherwise. Because a logical relationship between input and output is uniquely certain, the error-correction circuit with fault-tolerant nature may be implemented only by a logic gate.
申请公布号 US9577960(B2) 申请公布日期 2017.02.21
申请号 US201414581570 申请日期 2014.12.23
申请人 Huawei Technologies Co., Ltd. 发明人 Tang Yangyang;Zhang Chen-Xiong
分类号 H04L1/00;H04L12/939;H03M13/00;H03M13/11;G06F11/18;H03K19/23;H03M13/27;H03M13/43 主分类号 H04L1/00
代理机构 Conley Rose, P.C. 代理人 Conley Rose, P.C.
主权项 1. A universal error-correction circuit with fault-tolerant nature, comprising: an error-correction unit with fault-tolerant nature implemented by a logic gate, wherein digital input signals of the error-correction unit with fault-tolerant nature are separately I0, I1 . . . , I2k-1, and I2k, wherein a number of the digital input signals that exist in the universal error-correction circuit with fault-tolerant nature is 2k+1, wherein digital output signals of the error-correction unit with fault-tolerant nature are separately O0, O1 . . . , Ok-2, and Ok-1, wherein a number of the digital output signals that exist in the universal error-correction circuit with fault-tolerant nature is k, wherein the digital input signals and the digital output signals belong to a set {0,1}, wherein k is a positive integer, wherein the error-correction unit with fault-tolerant nature is configured to: set O0=I0 when k=1 and I0=I1;set O0=I2 when I0 is not equal to I1;set Ok-1=I2k-1 when k>1 and Ok-2=I2k-1; andset Ok-1=I2k when Ok-1 is not equal to I2k-1, wherein when k=3 in the error-correction unit with fault-tolerant nature, seven corresponding digital input signals are separately I0, I1, I2, I3, I4, I5, and I6, and three corresponding digital output signals are separately O0, O1, and O2, wherein the error-correction unit with fault-tolerant nature comprises three error-correction subunits with fault-tolerant nature, which are separately a first error-correction subunit with fault-tolerant nature, a second error-correction subunit with fault-tolerant nature, and a third error-correction subunit with fault-tolerant nature, each error-correction subunit with fault-tolerant nature is corresponding to three digital input signals and one digital output signal, and each error-correction subunit with fault-tolerant nature comprises a first AND gate, a first OR gate, a second AND gate, and a second OR gate, wherein two input signals of both the first AND gate and the first OR gate are a first digital input signal and a second digital input signal, one input signal of the second AND gate is a third digital input signal, the other input signal of the second AND gate is an output signal of the first OR gate, and an output signal of the second AND gate and an output signal of the first AND gate serve as two input signals of the second OR gate, wherein a first digital input signal, a second digital input signal, and a third digital input signal of the first error-correction subunit with fault-tolerant nature are I0, I1, and I2, respectively, and an output signal of the first error-correction subunit with fault-tolerant nature is O0, wherein a first digital input signal, a second digital input signal, and a third digital input signal of the second error-correction subunit with fault-tolerant nature are I3, I4, and O0, respectively, and an output signal of the second error-correction subunit with fault-tolerant nature is O1, and wherein a first digital input signal, a second digital input signal, and a third digital input signal of the third error-correction subunit with fault-tolerant nature are I5, I6, and O1, respectively, and an output signal of the third error-correction subunit with fault-tolerant nature is O2.
地址 Shenzhen CN
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