发明名称 Efficient processing and detection of balanced codes
摘要 Circuits that are matched to balanced codes may recover transmitted information in a noise resilient and power efficient manner. Circuit components for processing a balanced code may include one or more of: matched amplification of the signals representing the balanced code, matched equalization and/or filtering on the signals representing the balanced code, matched non-linear filtering on the signaling representing the balanced code to detect the presence of particular symbols and matched latching of the signals representing the balanced code. Such matched circuits and circuit components may be achieved at least in part by incorporating suitable common circuit nodes and/or a single energy source into circuit topologies.
申请公布号 US9577664(B2) 申请公布日期 2017.02.21
申请号 US201615231342 申请日期 2016.08.08
申请人 KANDOU LABS, S.A. 发明人 Tajalli Armin;Cronie Harm;Shokrollahi Amin
分类号 H03M5/00;H03M5/14;H03K17/687;H04L1/00;H04B3/54;H03F1/32;H03M13/29;H04B1/7156;G11B20/14 主分类号 H03M5/00
代理机构 Invention Mine LLC 代理人 Invention Mine LLC
主权项 1. An apparatus comprising: a pair of circuit branches comprising a first circuit branch and a second circuit branch the pair of circuit branches arranged in a differential amplifier configuration, each circuit branch comprising one or more transistors connected in parallel, each transistor having an input connected to a wire of a multi-wire bus and configured to receive a symbol of a balanced codeword from the connected wire, wherein at least one of the circuit branches comprises at least two transistors receiving different symbols of the balanced codeword; each circuit branch further comprising a load impedance, connected in series with the one or more transistors of the corresponding circuit branch; a current source connected to the pair of circuit branches, the current source having a fixed current magnitude, the current source configured to draw currents through the one or more transistors and load impedance of each of the pair of circuit branches; and a differential amplifier output node having a differential voltage output signal formed by the load impedances, the differential voltage output signal having one of two values equal in magnitude and opposite in sign, wherein the sign of the value of the differential output signal is used to identify one or more output bits.
地址 CH