| 发明名称 | Level shifter | ||
| 摘要 | An exemplary level shifter includes a clock level shifter configured to generate a level shifted clock signal from an input clock signal; and a switched capacitor logic controller coupled to the clock level shifter. The switched capacitor logic controller is configured to steer the level shifted clock signal based on a data signal and the input clock signal, providing a level shifted version of the data signal. | ||
| 申请公布号 | US9577616(B2) | 申请公布日期 | 2017.02.21 |
| 申请号 | US201514599664 | 申请日期 | 2015.01.19 |
| 申请人 | ANALOG DEVICES, INC. | 发明人 | Moore Ralph D.;Puckett Bryan S.;Jeffries Brad P. |
| 分类号 | H03K3/00;H03K3/356;H03K19/0185 | 主分类号 | H03K3/00 |
| 代理机构 | Patent Capital Group | 代理人 | Patent Capital Group |
| 主权项 | 1. A level shifter comprising: a clock level shifter configured to up-shift an input clock signal to generate a level-shifted clock signal; and a switched capacitor logic controller coupled to the clock level shifter at a node having the level-shifted clock signal, wherein the switched capacitor logic controller is configured to steer the level shifted clock signal based on a data signal and the input clock signal to charge a load, providing a level shifted version of the data signal. | ||
| 地址 | Norwood MA US | ||