Imaging device and electronic device

摘要

An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated.

主权项

1. An imaging device comprising:
a first circuit comprising;
a photoelectric conversion element comprising a first terminal and a second terminal;a first transistor comprising a source and a drain;a second transistor comprising a source and a drain;a third transistor comprising a source and a drain;a fourth transistor comprising a source and a drain;a fifth transistor comprising a source and a drain;a first capacitor comprising a first terminal and a second terminal; anda second capacitor comprising a first terminal and a second terminal; a second circuit comprising a sixth transistor comprising a source and a drain; and a third circuit comprising a seventh transistor comprising a source and a drain and a resistor comprising a first terminal and a second terminal, wherein the first terminal of the photoelectric conversion element is electrically connected to one of the source and the drain of the first transistor, wherein the other of the source and the drain of the first transistor is electrically connected to the first terminal of the first capacitor, wherein one of the source and the drain of the second transistor is electrically connected to the second terminal of the first capacitor, wherein the second terminal of the first capacitor is electrically connected to the first terminal of the second capacitor, wherein one of the source and the drain of the third transistor is electrically connected to the second terminal of the second capacitor, wherein the other of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the fourth transistor, wherein a gate of the fourth transistor is electrically connected to the one of the source and the drain of the third transistor, wherein one of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the fourth transistor, wherein the other of the source and the drain of the fifth transistor is electrically connected to one of the source and the drain of the sixth transistor, wherein one of the source and the drain of the seventh transistor is electrically connected to the other of the source and the drain of the fifth transistor, and wherein the other of the source and the drain of the seventh transistor is electrically connected to the first terminal of the resistor.