发明名称 Device and methods for high-k and metal gate stacks
摘要 A method for fabricating a semiconductor device includes providing a semiconductor substrate having regions for an n-type field-effect transistor (nFET) core, an input/output nFET (nFET IO), a p-type field-effect transistor (pFET) core, an input/output pFET (pFET IO), and a high-resistor, forming an oxide layer on the IO regions of the substrate, forming an interfacial layer on the substrate and the oxide layer, depositing a high-k (HK) dielectric layer on the interfacial layer, depositing a first capping layer of a first material on the HK dielectric layer, depositing a second capping layer of a second material on the HK dielectric layer and on the first capping layer, depositing a work function (WF) metal layer on the second capping layer, depositing a polysilicon layer on the WF metal layer, and forming gate stacks on the regions of the substrate.
申请公布号 US9576855(B2) 申请公布日期 2017.02.21
申请号 US201514679525 申请日期 2015.04.06
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Wu Wei Cheng;Young Bao-Ru;Chuang Harry-Hak-Lay;Ng Jin-Aun;Chen Po-Nien
分类号 H01L21/8238;H01L21/8234;H01L27/06;H01L29/49;H01L29/51 主分类号 H01L21/8238
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method for fabricating a semiconductor device, the method comprising: providing a semiconductor substrate having regions for an n-type field-effect transistor (nFET) core, an input/output nFET (nFET IO), a p-type field-effect transistor (pFET) core, an input/output pFET (pFET IO), and a high-resistor; forming an oxide layer directly on the IO regions of the substrate; forming an interfacial layer on the substrate in regions for the nFET core and pFET core and directly on the oxide layer in the regions for the nFET IO and pFET IO; depositing a high-k (HK) dielectric layer on the interfacial layer; depositing a first capping layer of a first material on the HK dielectric layer; depositing a second capping layer of a second material on the HK dielectric layer and on the first capping layer; depositing a work function (WF) metal layer on the second capping layer; depositing a polysilicon layer on the WF metal layer; and forming gate stacks on the regions of the substrate.
地址 Hsin-Chu TW