Fabrication of nanowire field effect transistor structures

摘要

Methods are presented for facilitating fabrication of nanowire structures, such as one or more nanowire field effect transistors. The methods include, for instance: providing a substrate; providing first material layers and second material layers above the substrate, the first material layers interleaved with the second material layers; removing portions of the first material layers and second material layers, the removing forming a plurality of nanowire stacks, including first material nanowires and second material nanowires; removing the first material nanowires from at least one nanowire stack; and removing the second material nanowires from at least one other nanowire stack, where the at least one nanowire stack and at least one other nanowire stack include a p-type nanowire stack(s) and a n-type nanowire stack(s), respectively.

主权项

1. A method comprising:
providing a substrate; providing a base layer above the substrate; providing first material layers and second material layers above the base layer, the first material layers interleaved with the second material layers, wherein the first material layers have a first lattice constant and the second material layers have a second lattice constant, the second lattice constant being higher than the first lattice constant, and wherein the base layer comprises a third material having a third lattice constant higher than the first lattice constant, wherein one first material layer of the first material layers is provided on the base layer, and the third lattice constant being higher than the first lattice constant inducing a strain in the one first material layer on the base layer; removing portions of the first material layers and second material layers, the removing forming a plurality of nanowire stacks comprising first material nanowires and second material nanowires; removing the entire base layer from above the substrate, the removing the base layer comprising providing a masking material over the plurality of nanowire stacks and leaving exposed one or more portions of the base layer, and etching the exposed portions of the upper surface of the base layer, the etching resulting in removal of the base layer entirely under the plurality of nanowire stacks, the masking material preventing etching of the plurality of nanowire stacks; removing the first material nanowires from at least one nanowire stack of the plurality of nanowire stacks; and removing the second material nanowires from at least one other nanowire stack of the plurality of nanowire stacks; wherein the at least one nanowire stack and at least one other nanowire stack comprise at least one p-type nanowire stack and at least one n-type nanowire stack, respectively.