发明名称 Systems and methods for providing improved latency in a non-uniform memory architecture
摘要 Systems, methods, and computer programs are disclosed for allocating memory in a portable computing device having a non-uniform memory architecture. One embodiment of a method comprises: receiving from a process executing on a first system on chip (SoC) a request for a virtual memory page, the first SoC electrically coupled to a second SoC via an interchip interface, the first SoC electrically coupled to a first local volatile memory device via a first high-performance bus and the second SoC electrically coupled to a second local volatile memory device via a second high-performance bus; determining a free physical page pair comprising a same physical address available on the first and second local volatile memory devices; and mapping the free physical page pair to a single virtual page address.
申请公布号 US9575881(B2) 申请公布日期 2017.02.21
申请号 US201414560290 申请日期 2014.12.04
申请人 QUALCOMM INCORPORATED 发明人 Molloy Stephen Arthur;Chun Dexter Tamio
分类号 G06F12/02;G11C7/10;G06F12/10 主分类号 G06F12/02
代理机构 Smith Tempel 代理人 Smith Tempel
主权项 1. A method for allocating memory in a portable computing device having a non-uniform memory architecture, the method comprising: receiving from a process executing on a first system on chip a request for a virtual memory page, the first SoC electrically coupled to a second SoC via an interchip interface, the first SoC electrically coupled to a first local volatile memory device via a first high-performance bus and the second SoC electrically coupled to a second local volatile memory device via a second high-performance bus; determining by the first SoC a free physical page pair between the first and second local volatile memory devices, wherein a free physical page pair comprises a first physical address on the first local volatile memory device and a second physical address on the second local volatile memory device that have the same physical address and wherein both the first and second physical addresses are available for memory allocation in their respective local volatile memory devices; and logically mapping by the first SoC the free physical page pair to a same virtual page address of the requested virtual memory page.
地址 San Diego CA US