发明名称 COMPLEMENTARY METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR, METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF
摘要 A complementary metal oxide semiconductor field-effect transistor (MOSFET) includes a substrate, a first MOSFET and a second MOSFET. The first MOSFET is disposed on the substrate within a first transistor region and the second MOSFET is disposed on the substrate within a second transistor region. The first MOSFET includes a first fin structure, two first lightly-doped regions, two first doped regions and a first gate structure. The first fin structure includes a first body portion and two first epitaxial portions, wherein each of the first epitaxial portions is disposed on each side of the first body portion. A first vertical interface is between the first body portion and each of the first epitaxial portions so that the first-lightly doped region is able to be uniformly distributed on an entire surface of each first vertical interface.
申请公布号 US2017047426(A1) 申请公布日期 2017.02.16
申请号 US201615335418 申请日期 2016.10.26
申请人 UNITED MICROELECTRONICS CORP. 发明人 Lin Chien-Ting;Tsai Shih-Hung
分类号 H01L29/66;H01L29/78;H01L21/8238;H01L29/06;H01L27/092;H01L21/762;H01L29/08 主分类号 H01L29/66
代理机构 代理人
主权项 1. A method for manufacturing a metal oxide semiconductor field-effect transistor (MOSFET) comprising: providing a substrate; forming a fin semiconductor layer on the substrate; forming a gate electrode overlying a portion of the fin semiconductor layer; forming a gate spacer disposed on sidewalls of the gate electrode, wherein a portion of the fin semiconductor layer is exposed from the gate spacer; removing the fin semiconductor layer exposed from the gate spacer so that a vertical interface is exposed from at least one side of the fin semiconductor layer; after the step of removing the fin semiconductor layer exposed from the gate spacer, concurrently forming at least an epitaxial layer and a lightly-doped region on the vertical interface, wherein the lightly-doped region is uniformly formed on the entire vertical interface and is disposed between the fin semiconductor layer under the gate electrode and the epitaxial layer at sides of the gate electrode; and forming a doped region in the epitaxial layer, wherein the doped region is a source/drain region.
地址 Hsin-Chu City TW