发明名称 INTEGRATION METHODS TO FABRICATE INTERNAL SPACERS FOR NANOWIRE DEVICES
摘要 A nanowire device having a plurality of internal spacers and a method for forming said internal spacers are disclosed. In an embodiment, a semiconductor device comprises a nanowire stack disposed above a substrate, the nanowire stack having a plurality of vertically-stacked nanowires, a gate structure wrapped around each of the plurality of nanowires, defining a channel region of the device, the gate structure having gate sidewalls, a pair of source/drain regions on opposite sides of the channel region; and an internal spacer on a portion of the gate sidewall between two adjacent nanowires, internal to the nanowire stack. In an embodiment, the internal spacers are formed by depositing spacer material in dimples etched adjacent to the channel region. In an embodiment, the dimples are etched through the channel region. In another embodiment, the dimples are etched through the source/drain region.
申请公布号 US2017047400(A1) 申请公布日期 2017.02.16
申请号 US201615333123 申请日期 2016.10.24
申请人 Intel Corporation 发明人 Kim Seiyon;KUHN Kelin J.;GHAN! Tahir;MURTHY Anand S.;ARMSTRONG Mark;RIOS Rafael;PETHE Abhijit Jayant;RACHMADY Willy
分类号 H01L29/06;H01L21/3105;H01L21/306;H01L21/3115;H01L29/66;H01L29/08 主分类号 H01L29/06
代理机构 代理人
主权项
地址 Santa Clara CA US
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