发明名称 NON-VOLATILE DYNAMIC RANDOM ACCESS MEMORY (NVDRAM) WITH PROGRAMMING LINE
摘要 A memory circuit includes a first bit line, a second bit line, and a memory cell that is coupled to first bit line and the second bit line. The memory cell includes a capacitor, a first pass gate transistor, a non-volatile (NV) element, and a second pass gate transistor. The first capacitor has a first terminal coupled to a first storage node and a second terminal coupled to a reference. The first pass gate transistor is coupled between the first bit line and the first storage node. The NV element and a second pass gate transistor are coupled in series, wherein the first NV element and the second pass gate transistor are coupled between the first storage node and the first program line.
申请公布号 US2017047098(A1) 申请公布日期 2017.02.16
申请号 US201514823698 申请日期 2015.08.11
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 ROY ANIRBAN;Sadd Michael A.
分类号 G11C5/06;G11C14/00 主分类号 G11C5/06
代理机构 代理人
主权项 1. A memory circuit, comprising: a first bit line; a first program line; a first memory cell, coupled to the first bit line and the first program line, comprising: a first capacitor having a first terminal coupled to a first storage node and a second terminal coupled to a reference;a first pass gate transistor coupled between the first bit line and the first storage node; anda first non-volatile (NV) element and a second pass gate transistor coupled in series, wherein the first NV element and the second pass gate transistor are coupled between the first storage node and the first program line; and a programming transistor having a first current electrode coupled to a second program line, a control electrode coupled to a word line, and a second current electrode coupled to a programming node between the second pass gate transistor and the NV element.
地址 AUSTIN TX US