发明名称 Memory with deferred fractional row activation
摘要 Row activation operations within a memory component are carried out with respect to subrows instead of complete storage rows to reduce power consumption. Further, instead of activating subrows in response to row commands, subrow activation operations are deferred until receipt of column commands that specify the column operation to be performed and the subrow to be activated.
申请公布号 US9570126(B2) 申请公布日期 2017.02.14
申请号 US201615138424 申请日期 2016.04.26
申请人 Rambus Inc. 发明人 Harris James E.;Vogelsang Thomas;Ware Frederick A.;Shaeffer Ian P.
分类号 G11C7/00;G11C7/12;G11C5/02;G11C7/10;G11C11/4076;G11C11/408;G11C11/4091;G11C7/06;G11C7/08;G11C7/22 主分类号 G11C7/00
代理机构 代理人 Shemwell Charles
主权项 1. A method of operation within a memory component, the method comprising: receiving: a row command and a row address, the row address indicating a row of storage cells within the memory component, anda first column command and a first column address, the first column address indicating a first column of data within a first subrow of storage cells included within the row of storage cells, and the first column command indicating a memory access operation to be carried out with respect to the first column of data; transferring a first subrow of data, including the first column of data, from the first subrow of storage cells to a first set of sense amplifiers in response to the first column command; and precharging bit lines coupled to the first subrow of storage cells a predetermined time after receiving the first column command if the first column command specifies an auto-precharge.
地址 Sunnyvale CA US