Address-remapped memory chip, memory module and memory system including the same

摘要

A memory chip includes a chip input-output pad unit, a plurality of semiconductor dies. The chip input-output pad unit includes a plurality of input-output pins connected to an external device and the plurality of semiconductor dies are connected commonly to the chip input-output pad unit and having a full memory capacity respectively. Each semiconductor die includes a die input-output pad unit, a memory region and a conversion block. The die input-output pad unit includes a plurality of input-output terminals respectively connected to the input-output pins of the chip input-output pad unit. The memory region includes an activated region corresponding to a portion of the full memory capacity and a deactivated region corresponding to a remainder portion of the full memory capacity. The conversion block connects the activated region except the deactivated region to the die input-output pad unit.

主权项

1. A memory chip comprising:
a chip input-output pad unit including a plurality of input-output pins connected to an external device; and a plurality of semiconductor dies connected to the chip input-output pad unit, each semiconductor die comprising:
a die input-output pad unit including a plurality of input-output terminals respectively connected to the input-output pins of the chip input-output pad unit;a memory region including an activated region corresponding to a portion of a full memory capacity of each semiconductor die and a deactivated region corresponding to a remainder portion of the full memory capacity; anda conversion block configured to connect the activated region, except the deactivated region, to the die input-output pad unit, wherein the conversion block includes:an address conversion block configured to generate an internal chip select signal and an internal most significant address bit signal corresponding to the activated region based on a chip select signal and a most significant address bit signal that are received through the chip input-output pad unit and the die input-output pad unit, andwherein the address conversion block is configured to remap the chip select signal and the most significant address bit signal to the internal chip select signal and the internal most significant address bit signal with at least one programmed fuse in the address conversion block.