发明名称 Power semiconductor device
摘要 According to one embodiment, a semiconductor device, includes an element unit including a vertical-type MOSFET, the vertical-type MOSFET in including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer sequentially stacked in order, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer, an insulator covering inner surfaces of a plurality of trenches, the adjacent trenches being provided with a first interval in between, and a diode unit including basically with the units of the element unit, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval.
申请公布号 USRE46311(E1) 申请公布日期 2017.02.14
申请号 US201514645251 申请日期 2015.03.11
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 Kawaguchi Yusuke
分类号 H01L29/788;H01L29/78;H01L29/423;H01L29/06;H01L29/40 主分类号 H01L29/788
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A power semiconductor device, comprising: an element unit comprising a vertical-type MOSFET, the vertical-type MOSFET comprising, a first semiconductor layer with a first conductivity type, a second semiconductor layer with the first conductivity type provided on a first main surface of the first semiconductor layer, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer, a third semiconductor layer with a second conductivity type provided on a surface of the second semiconductor layer, a fourth semiconductor layer with a first conductivity type selectively provided on a surface of the third semiconductor layer, a fifth semiconductor layer with the second conductivity type selectively provided on the surface of the third semiconductor layer, an insulator covering inner surfaces of a plurality of trenches, each trench penetrating the third semiconductor layer from a surface of the fourth semiconductor layer or a surface of the fifth semiconductor layer reaching the second semiconductor layer, the adjacent trenches being provided with a first interval in between, a first embedded conductive layer embedded at a bottom of the trench via the insulator, a second embedded conductive layer embedded at an upper portion of the first embedded conductive layer via the insulator, an interlayer insulator provided on the second embedded conductive layer, a first main electrode provided on a second main surface of the first semiconductor layer opposed to the first main surface, the first main electrode electrically connecting to the first semiconductor layer, a second main electrode provided on the a fourth semiconductor layer, the fifth semiconductor layer and the interlayer insulator, the second main electrode electrically connecting to the fourth semiconductor layer and the fifth semiconductor layer; and a diode unit adjacent to the element unit comprising, the first semiconductor layer, the second insulator semiconductor layer, the third semiconductor layer, the fifth semiconductor layer, the insulator covering the inner surfaces of the plurality of the trenches, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval, the first embedded conductive layer, the second embedded conductive layer, the interlayer insulator, the first main electrode, and the second main electrode.
地址 Tokyo JP