发明名称 Printing complex electronic circuits
摘要 A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
申请公布号 US9572249(B2) 申请公布日期 2017.02.14
申请号 US201414204800 申请日期 2014.03.11
申请人 Nthdegree Technologies Worldwide Inc. 发明人 Ray William Johnstone;Blanchard Richard Austin;Lowenthal Mark David;Oraw Bradley Steven
分类号 H05K7/00;H05K1/02;H01L25/00;H01L25/075;H01L33/20;H05K1/18;H01L23/31;H01L21/56;H01L23/00;H01L25/065 主分类号 H05K7/00
代理机构 Patent Law Group LLP 代理人 Patent Law Group LLP ;Ogonowsky Brian D.
主权项 1. A circuit comprising: a substrate; a plurality of separate groups of pre-formed, semiconductor electrical devices that have been mixed in a solution, deposited over the substrate, and cured, each group containing a plurality of substantially identical electrical devices connected in parallel within each group, all electrical devices connected in parallel forming a single group, all electrical devices connected in parallel in each group forming a random two-dimensional arrangement of the electrical devices on the substrate, wherein a total number of electrical devices connected in parallel within each group is random, wherein the electrical devices connected in parallel within each group are not aligned with each other in any predetermined way; an interconnection conductor pattern that interconnects at least some of the groups together to achieve an electrical logic function; at least one input terminal connected to the interconnection conductor pattern for receiving input signals for transformation by the electrical logic function to generate output signals; and at least one output terminal connected to the interconnection conductor pattern for receiving the output signals.
地址 Tempe CA US