发明名称 Method and apparatus for performing fast incremental physical design optimization
摘要 A method for designing a system on a target device includes generating a first netlist for a first version of the system after performing synthesis in a first compilation. Optimizations are performed on the first version of the system during placement and routing in the first compilation resulting in a second netlist. A third netlist is generated for a second version of the system after performing synthesis in a second compilation. A hybrid netlist is generated from the first, second, and third netlists. Incremental placement and routing are performed on portions of the hybrid netlist that are new to the first compilation.
申请公布号 US9569574(B1) 申请公布日期 2017.02.14
申请号 US201414200897 申请日期 2014.03.07
申请人 Altera Corporation 发明人 Khan Junaid Asim;Quan Gabriel;Padalia Ketan;Brissenden Scott James;Fung Ryan
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人 Cho L.
主权项 1. A method for designing a system on a target device, comprising: generating a first netlist for a first version of the system after performing synthesis in a first compilation; performing optimizations on the first version of the system during placement and routing in the first compilation resulting in a second netlist; generating a third netlist for a second version of the system after performing synthesis in a second compilation; generating a hybrid netlist from the first, second, and third netlists; and performing incremental placement and routing on portions of the hybrid netlist that are new to the first compilation.
地址 San Jose CA US