发明名称 Universal four-side buttable digital CMOS imager
摘要 An imager including sub-imager pixel arrays having a plurality of four-side buttable imagers distributed on a substrate and an on-chip digitizing readout circuit. Pixel groupings formed from among the plurality of four-side buttable imagers. The readout electronics including a buffer amplifier for each of the pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping. A plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings. An analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends. An output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.
申请公布号 US9571765(B2) 申请公布日期 2017.02.14
申请号 US201514750067 申请日期 2015.06.25
申请人 General Electric Company 发明人 Guo Jianjun;Yanoff Brian David;Short Jonathan David;Jacob Biju
分类号 H04N5/335;H04N5/369;H04N5/378 主分类号 H04N5/335
代理机构 代理人 Dobson Melissa K.
主权项 1. An imager tile comprising: an array of sub-imager pixel arrays, the sub-imager pixel arrays arranged in rows and columns; each of the sub-imager pixel arrays including a plurality of four-side buttable imagers distributed on a wafer substrate and an on-chip digitizing electronic readout circuit; each of the four-side buttable imagers including at least one photodiode configured to be exposed to incident photon radiation; a plurality of pixel groupings formed from among the plurality of imagers; the readout electronics including a buffer amplifier for each of the plurality of pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping; a plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings; an analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends; and an output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.
地址 Niskayuna NY US