Managing error data and resetting a computing system

摘要

Various techniques for managing a system reset of a computing system to maintain error data are described herein. In one example, a computing system configured for managing a system reset to maintain error data comprises a memory buffer device to receive a transaction from a system processor and to notify the system processor of an error in performing the transaction to volatile memory. In some examples, the system processor is configured to initiate a system reset of the computing system in response to the error, the system reset comprising a reset of the memory buffer device. Furthermore, the computing system includes an integrated circuit to block the reset of the memory buffer device to maintain error data in the volatile memory.

主权项

1. A computing system configured for managing a system reset to maintain error data, the computing system comprising:
a memory buffer device to receive a transaction from a system processor and translate the transaction between the system processor and volatile memory, the volatile memory comprising random access memory (RAM), wherein the memory buffer device to notify the system processor of the memory buffer device experiencing an error in the memory buffer device performing the transaction to the volatile memory; the system processor configured to initiate a system reset of the computing system in response to the error, the system reset comprising a reset of the memory buffer device; and an integrated circuit comprising a programmable logic device (PLD) to block the reset of the memory buffer device so to maintain error data in the volatile memory.