| 摘要 |
The present invention includes embodiments of systems and methods for increasing the operational efficiency and extending the estimated operational lifetime of a flash memory storage device (and its component flash memory chips, LUNs and blocks of flash memory) by monitoring the health of the device and its components and, in response, adaptively tuning the operating parameters of flash memory chips during their operational lifetime, as well as employing other less extreme preventive measures in the interim, via an interface that avoids the need for direct access to the test modes of the flash memory chips. In an offline characterization phase, “test chips” from a batch of recently manufactured flash memory chips are used to simulate various usage scenarios and measure the performance effects of writing and attempting to recover (read) test patterns written with different sets of operating parameters over time (simulating desired retention periods). |
| 主权项 |
1. A flash memory controller that controls the operation of one or more flash memory chips, each chip organized into one or more LUNs, and each LUN associated with one or more blocks of flash memory and one or more control registers storing operating parameters associated with that LUN, the flash memory controller comprising:
(a) an operating parameter database that stores, with respect to each LUN of the one or more flash memory chips, a plurality of sets of operating parameters, each set of operating parameters corresponding to a health stage representing an estimated level of degradation of the flash memory within that LUN; (b) a controller memory command module that issues read, write and erase controller memory commands to the flash memory chips, wherein each of the flash memory chips implements the controller memory commands by applying varying levels of electrical stimuli to the blocks of flash memory in a LUN in accordance with current values of the operating parameters associated with that LUN; and (c) an inference engine that:
(i) analyzes a plurality of wear indicators that evidence degradation of the flash memory over time, wherein one of the plurality of wear indicators is a current cumulative number of program/erase cycles performed by the flash memory controller during the operational lifetime of the one or more flash memory chips, and(ii) determines, based on the analysis of the wear indicators, whether a transition of a LUN from a current health stage to a subsequent health stage is warranted and, if so, replaces the contents of the LUN's control registers with the set of operating parameters corresponding to the subsequent health stage. |
