Solid-state imaging device

摘要

A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.

主权项

1. A solid-state imaging device comprising:
a sensor panel section formed on a first substrate, and having a photodetecting section constructed by two-dimensionally arraying pixels, each including a photodiode and a thin-film transistor having one current terminal connected to the photodiode, over a plurality of rows and a plurality of columns, a plurality of row selection lines provided for the respective rows and connected to control terminals of the thin-film transistors included in the pixels of the corresponding rows, and a plurality of readout lines provided for the respective columns and connected to the other current terminals of the thin-film transistors included in the pixels of the corresponding columns; a readout circuit section disposed on a second substrate different from the first substrate, and having a plurality of integration circuits for respectively outputting voltage values corresponding to amounts of charges input through the plurality of readout lines; a plurality of panel-side connection points disposed on the first substrate, and for respectively interconnecting the plurality of readout lines on the first substrate and the plurality of integration circuits on the second substrate; a plurality of rectifier circuits respectively connected between a plurality of nodes between the plurality of panel-side connection points and the plurality of integration circuits and a constant potential line; and a plurality of circuit elements respectively connected between the plurality of nodes and the plurality of readout lines, and having resistance components.