Dislocation stress memorization technique for FinFET device

摘要

A method for performing a stress memorization technique (SMT) a FinFET and a FinFET having memorized stress effects including multi-planar dislocations are disclosed. An exemplary embodiment includes receiving a FinFET precursor with a substrate, a fin structure on the substrate, an isolation region between the fin structures, and a gate stack over a portion of the fin structure. The gate stack separates a source region of the fin structure from a drain region of the fin structure and creates a gate region between the two. The embodiment also includes forming a stress-memorization technique (SMT) capping layer over at least a portion of each of the fin structures, isolation regions, and the gate stack, performing a pre-amorphization implant on the FinFET precursor by implanting an energetic doping species, performing an annealing process on the FinFET precursor, and removing the SMT capping layer.

主权项

1. A method of manufacturing a semiconductor device comprising:
receiving a FinFET precursor comprising:
a substrate;a fin structure formed on the substrate;an isolation region formed on the substrate and isolating the fin structure such that a top portion of the fin structure is disposed above a topmost surface of the isolation region and a bottom portion of the fin structure is disposed below the topmost surface of the isolation region; anda gate stack formed over a portion of the fin structure, thereby separating a source region of the fin structure from a drain region of the fin structure and creating a gate region of the fin structure therebetween; forming a stress-memorization technique (SMT) capping layer over at least a portion of each of the fin structure, the isolation region, and the gate stack; after forming the SMT capping layer, performing a pre-amorphization implant on the FinFET precursor by implanting an energetic doping species, wherein the pre-amorphization implant creates an amorphous region within the fin structure that extends into the bottom portion of the fin structure below the topmost surface of the isolation region; performing an annealing process on the FinFET precursor, thus recrystallizing the amorphous region; and removing the SMT capping layer.