| 发明名称 | Testing through-silicon-vias | ||
| 摘要 | Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TS V to at least one of a test input and a test evaluation circuit. | ||
| 申请公布号 | US9570196(B2) | 申请公布日期 | 2017.02.14 |
| 申请号 | US201214241407 | 申请日期 | 2012.08.31 |
| 申请人 | Rambus Inc. | 发明人 | Vogelsang Thomas;Ng William N.;Ware Frederick A. |
| 分类号 | G01R31/28;G11C29/04;G11C29/02;H01L21/66;G11C8/10;H01L25/065 | 主分类号 | G01R31/28 |
| 代理机构 | Lowenstein Sandler LLP | 代理人 | Lowenstein Sandler LLP |
| 主权项 | 1. An integrated circuit (IC) device comprising: a field of through silicon vias (TSVs); an address decoder that selectably couples at least one of the TSVs to at least one of a test input or a test evaluation circuit; and switches, wherein the address decoder is to selectably couple at least one of the TSVs to at least one of the test input or the test evaluation circuit using the switches. | ||
| 地址 | Sunnyvale CA US | ||