System and method for performing memory operations on RRAM cells

摘要

A resistive RAM (RRAM) device has a bit line, a word line, a source line carrying a bias voltage that is a substantially static and non-negative voltage, an RRAM cell, and a bit line control coupled to the bit line circuit. The RRAM cell includes a gate node coupled to the word line, a bias node coupled to the source line, and a bit line node coupled to the bit line. The bit line control circuit is configured to generate non-negative command voltages to perform respective memory operations on the RRAM cell.

主权项

1. A resistive RAM device, comprising:
a plurality of bit lines, a word line, a source line carrying a bias voltage that is non-negative and is substantially the same voltage while performing set operations, reset operations and read operations; a plurality of RRAM cells coupled to the word line, wherein each RRAM cell of the plurality of RRAM cells coupled to the word line comprises:
a single resistive memory element,a transistor having a gate node coupled to the word line,a bias node coupled to the source line, anda bit line node coupled to a respective bit line of the plurality of bit lines; and a bit line control circuit coupled to one or more of the plurality of bit lines, the bit line control circuit generating command voltages to perform respective memory operations on one or more RRAM cells of the plurality of RRAM cells, wherein the respective memory operations include:
a set operation that sets respective RRAM cells of the plurality of RRAM cells, wherein a set voltage generated by the bit line control circuit for the set operation is greater than the bias voltage; anda reset operation that resets respective RRAM cells of the plurality of RRAM cells, wherein the bias voltage is greater than a reset voltage generated by the bit line control circuit for the reset operation.