发明名称 Supercomputer using wafer scale integration
摘要 A semiconductor structure includes a substrate with cooling layers, cooling channels, coolant inlets and outlets in fluid communication with the cooling channels, and a device layer on the cooling layers with one or more connection points and a device layer area. The device layer thermal coefficient of expansion is substantially equal to that of the cooling layers. A plurality of laminate substrates are disposed on, and electrically attached to, the device layer. The laminate substrate thermal coefficient of expansion differs from that of the device layer, each laminate substrate is smaller than the device layer portion to which it is attached, and each laminate substrate includes gaps between sides of adjacent laminate substrates. The laminate substrates are not electrically or mechanically connected to each other across the gaps therebetween and the laminate substrates are small enough to prevent warping of the device, interconnection and cooling layers due to thermal expansion.
申请公布号 US9568960(B2) 申请公布日期 2017.02.14
申请号 US201514627657 申请日期 2015.02.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Colgan Evan G.;Denneau Monty M.;Knickerbocker John
分类号 H01L23/473;G06F1/18;G06F1/20;H01L23/367;H01L23/498 主分类号 H01L23/473
代理机构 F. Chau & Associates, LLC 代理人 F. Chau & Associates, LLC
主权项 1. A semiconductor structure comprising: a substrate that includes one or more cooling layers, one or more cooling channels, one or more coolant inlets and outlets in fluid communication with the cooling channels, a device layer disposed on the cooling layers that has one or more connection points and a device layer area, wherein a device layer thermal coefficient of expansion is substantially equal to that of the one or more cooling layers; a plurality of laminate substrates arranged in an array that are disposed on, and electrically attached to, the device layer, wherein a laminate substrate thermal coefficient of expansion differs from that of the device layer, and each laminate substrate is smaller in area than an area of the device layer portion to which it is attached, and each laminate substrate includes sides with, gaps between sides of adjacent laminate substrates, wherein the laminate substrates are not electrically or mechanically connected to each other across the gaps between laminate substrates and the laminate substrates are small enough to substantially prevent warping and unacceptable stress of the device layer, interconnection and cooling layers due to thermal expansion.
地址 Armonk NY US