发明名称 |
Testing fuse configurations in semiconductor devices |
摘要 |
A system includes a first integrated circuit configured to operate in at least a normal mode and a test mode and a second integrated circuit, where both the first integrated circuit and the second integrated circuit are disposed within a same semiconductor device package. The system further includes a first terminal, external to the semiconductor device package, electronically coupled to the first integrated circuit and the second integrated circuit. The first terminal is electronically coupled to a buffer in the second integrated circuit and used to convey signals to or from the first integrated circuit. |
申请公布号 |
US9568544(B2) |
申请公布日期 |
2017.02.14 |
申请号 |
US201414250191 |
申请日期 |
2014.04.10 |
申请人 |
RAMBUS INC. |
发明人 |
Ong Adrian E.;Fuller Paul;Heel Nick van;Thomann Mark |
分类号 |
G01R31/02;G01R31/28;G01R31/317 |
主分类号 |
G01R31/02 |
代理机构 |
Lowenstein Sandler LLP |
代理人 |
Lowenstein Sandler LLP |
主权项 |
1. A system comprising:
a first integrated circuit configured to operate in at least a normal mode and a test mode, wherein the first integrated circuit comprises a memory device, the memory device comprising a latch and a fuse, the latch to receive fuse configuration data and to output a soft-blow signal based on the fuse configuration data, the soft-blow signal to configure the fuse; a second integrated circuit comprising a buffer, wherein the second integrated circuit comprises a memory controller, both the first integrated circuit and the second integrated circuit being disposed within the same semiconductor device package; a first terminal external to the semiconductor device package, electronically coupled to the first integrated circuit and the second integrated circuit, the first terminal electronically coupled to the buffer in the second integrated circuit and used to convey signals to or from the first integrated circuit. |
地址 |
Sunnyvale CA US |