发明名称 |
Methods of Forming Nanosheets on Lattice Mismatched Substrates |
摘要 |
Methods of forming nanosheets for a semiconductor device are provided including providing a silicon on insulator (SOI) handle wafer, the SOT handle wafer including a silicon layer and a dielectric layer on the silicon layer; providing a first donor wafer; bonding the SOI handle wafer and the first donor wafer together to provide a bonded structure; debonding the bonded structure to provide an intermediate wafer including a plurality of silicon or non-silicon nano sheets and a plurality of dielectric layers alternately stacked; and bonding the intermediate wafer to a second donor wafer to provide a final wafer including a plurality of silicon or non-silicon layers and a plurality of dielectric layers alternately stacked, wherein the final wafer includes at least one more pair of silicon or non-silicon and dielectric layers than the intermediate wafer. |
申请公布号 |
US2017040209(A1) |
申请公布日期 |
2017.02.09 |
申请号 |
US201615066177 |
申请日期 |
2016.03.10 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Wang Wei-E;Rodder Mark;Obradovic Borna |
分类号 |
H01L21/762;H01L21/322;H01L21/306;H01L21/311 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
1. A method of forming nanosheets for a semiconductor device, the method comprising:
providing a silicon on insulator (SOI) handle wafer, the SOT handle wafer including a silicon layer and a dielectric layer on the silicon layer; providing a first donor wafer; bonding the SOI handle wafer and the first donor wafer together to provide a bonded structure; debonding the bonded structure to provide an intermediate wafer including a plurality of silicon or non-silicon nanosheets and a plurality of dielectric layers alternately stacked; and bonding the intermediate wafer to a second donor wafer to provide a final wafer including a plurality of silicon or non-silicon nanosheets and a plurality of dielectric layers alternately stacked, wherein the final wafer includes at least one more pair of silicon or non-silicon and dielectric layers than the intermediate wafer. |
地址 |
Suwon-si KR |