发明名称 RESISTIVE MEMORY ACCELERATOR
摘要 Presented is a method and apparatus for solving. The method includes receiving, by a resistive memory array, a first data, the resistive memory array comprising a plurality of cells, wherein the receiving comprises setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the first data. The method further includes receiving, by the resistive memory array, a second data, wherein the receiving comprises applying at least one of a current and a voltage based on the second data on the plurality of cells. The method still further includes determining, by the resistive memory array, an initial unknown value, the initial value based on the first data and the second data.
申请公布号 US2017040054(A1) 申请公布日期 2017.02.09
申请号 US201615229818 申请日期 2016.08.05
申请人 Friedman Eby;Richter Isaac;Guo Xiaochen;Kazemi Mohammad;Pas Kamil;Patel Ravi;Ipek Engin;Liu Ji 发明人 Friedman Eby;Richter Isaac;Guo Xiaochen;Kazemi Mohammad;Pas Kamil;Patel Ravi;Ipek Engin;Liu Ji
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A method comprising: (a) receiving, by a resistive memory array, a first data, the resistive memory array comprising a plurality of cells, wherein the receiving comprises setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the first data; (b) receiving, by the resistive memory array, a second data, wherein the receiving comprises applying at least one of a current and a voltage based on the second data on the plurality of cells; and (c) determining, by the resistive memory array, an initial unknown value, the initial value based on the first data and the second data.
地址 Rochester NY US