| 主权项 |
1. A semiconductor memory device, comprising:
a semiconductor substrate; a memory cell array configured having a plurality of memory units, each of the memory units including a plurality of memory cells connected in series, the plurality of memory cells being stacked, the plurality of memory units involving a first memory unit and a second memory unit; and a plurality of bit lines connected to ends of each of the memory units in the memory cell array, the plurality of bit lines involving a first bit line and a second bit line, the first bit line being adjacent to the second bit line, the first bit line being connected to the first memory unit, the second bit line being connected to the second memory unit, wherein the first memory unit and the second memory unit are arranged in a staggered manner by the first memory unit being displaced in a row direction with respect to the second memory unit by an amount less than an arrangement pitch in a row direction of the first memory unit or the second memory unit. |
