发明名称 CIRCUIT DESIGN METHOD AND SYSTEM
摘要 A method of designing a circuit includes designing a first layout of the circuit based on a first plurality of corner variation values for an electrical characteristic of a corresponding plurality of back end of line (BEOL) features of the circuit. Based on the layout, a processor calculates a first delay attributable to the plurality of BEOL features and a second delay attributable to a plurality of front end of line (FEOL) devices of the circuit. If the first delay is greater than the second delay, a second layout of the circuit is designed based on a second plurality of corner variation values for the electrical characteristic of the corresponding plurality of BEOL features. Each corner variation value of the first plurality of corner variation values is obtained by multiplying a corresponding corner variation value of the second plurality of corner variation values by a corresponding scaling factor.
申请公布号 US2017039310(A1) 申请公布日期 2017.02.09
申请号 US201615299711 申请日期 2016.10.21
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 WANG Chung-Hsing;TAM King-Ho;CHEN Yen-Pin;CHEN Wen-Hao;LIN Chung-Kai;YAO Chih-Hsiang
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A method of designing a circuit to be fabricated by a predetermined fabrication process, the method comprising: designing a first layout of the circuit based on a first plurality of corner variation values for an electrical characteristic of a corresponding plurality of back end of line (BEOL) features of the circuit to be fabricated by the predetermined fabrication process; using a processor, calculating, based on the circuit layout, a first delay attributable to the plurality of BEOL features and a second delay attributable to a plurality of front end of line (FEOL) devices of the circuit; and if the first delay is greater than the second delay, designing a second layout of the circuit based on a second plurality of corner variation values for the electrical characteristic of the corresponding plurality of BEOL features, wherein each corner variation value of the first plurality of corner variation values is obtained by multiplying a corresponding corner variation value of the second plurality of corner variation values by a corresponding scaling factor.
地址 Hsinchu TW
您可能感兴趣的专利