| 发明名称 |
INTEGRATED CIRCUIT DEVICE AND METHOD FOR READING DATA FROM AN SRAM MEMORY |
| 摘要 |
In accordance with an embodiment of the invention, an IC device is disclosed. In the embodiment, the IC device includes an array of bit cells of static random-access memory (SRAM), a multi-level digitization module configured to generate a value in a range of values from a bit cell in the array of bit cells, the range of values including more than two discrete values, an output buffer configured to store the generated values, and an error correction code (ECC) decoder configured to output error corrected values based on the stored values. |
| 申请公布号 |
US2017039102(A1) |
申请公布日期 |
2017.02.09 |
| 申请号 |
US201514820396 |
申请日期 |
2015.08.06 |
| 申请人 |
NXP B.V. |
发明人 |
Engin Nur;Kapoor Ajay |
| 分类号 |
G06F11/10;G11C29/42;G11C29/52 |
主分类号 |
G06F11/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit (IC) device comprising:
an array of bit cells of static random-access memory (SRAM); a multi-level digitization module configured to generate a value in a range of values from a bit cell in the array of bit cells, the range of values including more than two discrete values; an output buffer configured to store the generated values; and an error correction code (ECC) decoder configured to output error corrected values based on the stored values. |
| 地址 |
Eindhoven NL |
