| 摘要 |
Disclosed are a drive circuit of a source driver chip (220, 320) and a liquid crystal display panel. In the drive circuit of the source driver chip (220, 320), an output end of a blanking timer (210, 310) is connected to a control end of a switching unit (221, 321), an input end of the switching unit (221, 321) is connected to a power supply (VCC), and an output end of the switching unit (221, 321) is connected to a power end of a buffer amplifier (222, 322). The blanking timer (210, 310) is configured to generate a control signal (Vin), wherein the control signal (Vin) is at a first electrical level during a line blanking period or frame blanking period, and is at a second electrical level during a non-line blanking period or non-frame blanking period. The switching unit (221, 321) is configured to be in an off state when the control signal (Vin) is at the first electrical level such that the power supply (VCC) cannot power the power end of the buffer amplifier (222, 322) through the switching unit (221, 321), and is configured to be in an on state when the control signal (Vin) is at the second electrical level such that the power supply (VCC) powers the power end of the buffer amplifier (222, 322) through the switching unit (221, 321). The drive circuit of the source driver chip (220, 320) and the liquid crystal display panel can effectively reduce power consumption. |
