| 摘要 |
A technique for transferring data in a digital signal processing system is described. In one example, the digital signal processing system comprises a number of hardware peripherals, each connected to a memory access controller and each configured to read data from a memory device, perform one or more operations on the data, and write data to the memory device. To avoid hardwiring the hardware peripherals together, and to provide a configurable digital signal processing system, a multi-threaded processor controls the transfer of data between the hardware peripherals and the memory. Each processor thread is allocated to a memory access channel, and the threads are configured to detect an occurrence of an event and, responsive to this, control the memory access controller to enable a selected hardware peripheral to read data from or write data to the memory device via its memory access channel. |
