发明名称 Initializing a descrambler
摘要 Embodiments herein describe techniques for synchronizing LFSRs located on two compute devices. To synchronize the LFSRs, a first one of the compute devices may transmit a first training block that includes a predefined bit sequence. The training block is scrambled by a transmitting (TX) LFSR on the first compute device and then transmitted to the second compute device. The second compute device performs an XOR operation to recover the outputs of the TX LFSR that were used to scramble the data. The second compute device can use the outputs of the TX LFSR to determine future outputs of the TX LFSR. These future outputs are then used to initialize a receiving (RX) LFSR on the second compute device. Now, when subsequent training blocks are received, the second compute device can use the initialized RX LFSR to descramble the scrambled training blocks.
申请公布号 US9565014(B2) 申请公布日期 2017.02.07
申请号 US201514833458 申请日期 2015.08.24
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Ganfield Paul A.
分类号 H04L7/033;H04L7/00 主分类号 H04L7/033
代理机构 Patterson + Sheridan, LLP 代理人 Patterson + Sheridan, LLP
主权项 1. A method, comprising: receiving on a first compute device training data scrambled using a transmitting linear-feedback shift register (LFSR) on a second compute device; determining past output values used by the transmitting LFSR to scramble the training data by comparing the scrambled training data with expected data stored on the first compute device; determining future output values of the transmitting LFSR based on the past output values; identifying a plurality of registers values defining a future state of the transmitting LFSR based on the future output values; and initializing a receiving LFSR on the first compute device using the plurality of register values to synchronize the receiving LFSR with the transmitting LFSR.
地址 Armonk NY US