发明名称 Gate driving circuit and display device having the same
摘要 A gate driving circuit includes plural-stage output circuits, an Nth stage output circuit of the plural-stage output circuits includes an Nth stage shift register and a mixer. The Nth stage shift register is configured to output an Nth pulse signal. The mixer is coupled to the Nth stage shift register and an (N+M)th stage shift register, for respectively outputting a first clock signal and a predetermined pulse signal during different periods according to the Nth pulse signal and an (N+M)th pulse signal of the (N+M)th stage shift register. Wherein pulse widths or phases of the first clock signal and the predetermined pulse signal are different, and N and M are positive integers.
申请公布号 US9564889(B2) 申请公布日期 2017.02.07
申请号 US201414296421 申请日期 2014.06.04
申请人 AU OPTRONICS CORP. 发明人 Lin Chen-Chi;Liu Chun-Hsin
分类号 G09G5/00;H03K17/56;G09G3/32 主分类号 G09G5/00
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A gate driving circuit, comprising plural-stage output circuits, an Nth stage output circuit of the plural-stage output circuits comprising: an Nth stage shift register configured to output an Nth pulse signal; and a mixer coupled to the Nth stage shift register and an (N+M)th stage shift register of an (N+M)th stage output circuit of the plural-stage output circuits connected to the Nth stage shift register in series, for respectively outputting a first clock signal and a predetermined pulse signal during different periods according to the Nth pulse signal and an (N+M)th pulse signal of the (N+M)th stage shift register; wherein pulse widths or phases of the first clock signal and the predetermined pulse signal are different, and N and M are positive integers.
地址 Hsin-Chu TW