发明名称 |
Memory device having a different source line coupled to each of a plurality of layers of memory cell arrays |
摘要 |
A sensing voltage may be applied to a particular memory cell that is in a particular layer of a plurality of layers of memory cells. While the sensing voltage is applied to the particular memory cell, a source voltage may be applied to an end of a string of memory cells that includes the particular memory cell. The source line voltage may be based on a programming rate of the particular layer. |
申请公布号 |
US9564227(B2) |
申请公布日期 |
2017.02.07 |
申请号 |
US201514936719 |
申请日期 |
2015.11.10 |
申请人 |
Micron Technology, Inc. |
发明人 |
Goda Akira;Liu Zengtao |
分类号 |
G11C16/10;G11C5/02;G11C16/04;G11C11/56;G11C16/28;G11C16/26 |
主分类号 |
G11C16/10 |
代理机构 |
Dicke, Billig & Czaja, PLLC |
代理人 |
Dicke, Billig & Czaja, PLLC |
主权项 |
1. A method for operating a memory device that comprises a memory array that comprises a plurality of layers of memory cells, the method comprising:
applying a sensing voltage to a particular memory cell that is in a particular layer of the plurality of layers of memory cells; and applying a source voltage to an end of a string of memory cells that includes the particular memory cell while applying the sensing voltage to the particular memory cell; wherein the source voltage is based on a programming rate of the particular layer; and wherein the source voltage being based on the programming rate of the particular layer comprises the source voltage being greater for a slower programming rate of the particular layer than for a faster programming rate of the particular layer. |
地址 |
Boise ID US |