发明名称 Method and apparatus for additive range reduction
摘要 A method and apparatus for additive range reduction are disclosed. A constant may be pre-stored in a look-up table (LUT), and at least one section of the constant may be retrieved from the LUT for generating a product of an input argument and the constant such that a precision of the product may be controlled in any granularity. For a trigonometric function, 2/π is stored in the LUT, and at least one section of 2/π may be retrieved from the LUT. The argument is multiplied with the retrieved sections of 2/π. The retrieved sections are determined to correctly generate the two least significant bits (LSBs) of an integer portion and a scalable number of most significant bits of the multiplication result. An output of the trigonometric function is generated for the argument with a fractional portion of the multiplication result based on two LSBs of the integer portion of the multiplication result.
申请公布号 US9563402(B2) 申请公布日期 2017.02.07
申请号 US201113223974 申请日期 2011.09.01
申请人 ADVANCED MICRO DEVICES, INC. 发明人 Spencer Christopher L.;Zou Yun-Xiao;Sumner Brian L.
分类号 G06F7/548 主分类号 G06F7/548
代理机构 Volpe and Koenig, P.C. 代理人 Volpe and Koenig, P.C.
主权项 1. A method implemented in a processor for generating an output of a function, the method comprising: a processor receiving an argument of a function; the processor retrieving a section of a constant from a look-up table (LUT) in a memory, wherein the section of the constant is retrieved such that a product of the argument and the section of the constant generates at least two least significant bits (LSBs) of an integer portion of the product and a scalable number of most significant bits (MSBs) of the product; and the processor generating an output of the function based on multiplication of the argument and the retrieved section of the constant.
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