| 摘要 |
Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to long-channel transistors, but are suitable for analog circuits in deep-submicron technologies at deep-submicron process nodes. The macro-transistor structures can be implemented, for instance, with a plurality of transistors constructed and arranged in series, and with their gates tied together, generally referred to herein as a transistor stack. One or more of the serial transistors within the stack can be implemented with a plurality of parallel transistors and/or can have a threshold voltage that is different from the threshold voltages of other transistors in the stack. Alternatively, or in addition, one or more of the serial transistors within the macro-transistor can be statically or dynamically controlled to tune the performance characteristics of the macro-transistor. The macro-transistor can be used in numerous circuits, such as varactors, VCOs, PLLs, and tunable circuits. |
| 主权项 |
1. A semiconductor integrated circuit, comprising:
a bulk or semiconductor-on-insulator substrate; and a plurality of transistors over the substrate, each having a source, drain and gate, the transistors electrically connected in series and with their respective gates tied together such that the transistors can be active at the same time, wherein at least one of the transistors provides degeneration to at least one of the other transistors; wherein at least one of the transistors is a macro-transistor that comprises a plurality of transistors connected at least one of serially and in parallel and having the same number of terminals as an individual transistor. |
