Dual vertical channel

摘要

Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a first channel region and a second channel region that are formed according to at least one of a vertical channel configuration or a dual channel configuration. The first channel region operates as a first channel between a source region and a drain region of the semiconductor arrangement. The second channel region operates as a second channel between the source region and the drain region. A gate region, formed between the first channel region and the second channel region, operates to control the first channel and the second channel. Performance of the semiconductor arrangement is improved, such as an increase in current, because two current paths between the source region and the drain region are provided by the two channels.

主权项

1. A semiconductor arrangement comprising a dual channel configuration, comprising:
a source region having a bottom surface directly contacting a top surface of a substrate; a dual channel comprising:
a first channel region having a bottom surface directly contacting a top surface of a first source region portion of the source region; anda second channel region having a bottom surface directly contacting a top surface of a second source region portion of the source region; a gate region horizontally between a sidewall of the first channel region and a sidewall of the second channel region, the gate region having a bottom surface directly contacting a top surface of a third source region portion of the source region; and a drain region having a bottom surface directly contacting a top surface of the first channel region, a top surface of the second channel region, and a top surface of the gate region.