Touch panel substrate, electronic device, and production method for electronic device

摘要

The present invention provides a touch panel substrate that allows for greater design freedom when designing conductive wire patterns for reducing occurrence of the moiré effect. The touch panel substrate includes: a first electrode layer that includes first conductive wires and second conductive wires; and a second electrode layer that includes third conductive wires and fourth conductive wires. When viewed in a plan view, the first conductive wires and the third conductive wires form first quadrilaterals, and the second conductive wires and the fourth conductive wire form second quadrilaterals. The first quadrilaterals and the second quadrilaterals are not identical to one another.

主权项

1. A touch panel substrate, comprising:
a first electrode layer and a second electrode layer, wherein the first electrode layer includes a plurality of mutually parallel first conductive wires and a plurality of mutually parallel second conductive wires that intersect with the first conductive wires, wherein the second electrode layer includes a plurality of mutually parallel third conductive wires and a plurality of mutually parallel fourth conductive wires that intersect with the third conductive wires, wherein an angle between the first conductive wires and the second conductive wires is not equal to 90°, and the first conductive wires and second conductive wires form a lattice pattern that includes a plurality of parallelograms in which in each parallelogram, adjacent sides have different lengths, wherein an angle between the third conductive wires and the fourth conductive wires is not equal to 90°, and the third conductive wires and fourth conductive wires form a lattice pattern that includes a plurality of parallelograms in which in each parallelogram, adjacent sides have different lengths, wherein the first electrode layer and the second electrode layer being overlaid in a plan view causes the adjacent first conductive wires and adjacent third conductive wires to define a plurality of first quadrilaterals, and the adjacent second conductive wires and adjacent fourth conductive wires to define a plurality of second quadrilaterals, and wherein the first quadrilaterals and the second quadrilaterals are not identical.