MULTI-CHIP PACKAGE HAVING ENCAPSULATION BODY TO REPLACE SUBSTRATE CORE

摘要

A multi-chip package having no substrate is presented. The multi-chip package includes a chip stacked assembly, a first redistribution layer, a plurality of wire bonds, a plurality of metal pillars, an encapsulation, a second redistribution layer, and a plurality of vertical interposers. The first redistribution layer and the second redistribution layer are used in place of a substrate to reduce the thickness of the multi-chip package. In this way, a package-on-package device formed using the multi-chip package has a reduced thickness.

主权项

1. A multi-chip package comprising:
a chip stacked assembly, the chip stacked assembly having a plurality of chips stacked on each other to form a staggered arrangement, an active surface of a top chip of the plurality of chips being exposed by the chip stacked assembly, at least one bonding pad of the plurality of chips being exposed by the chip stacked assembly; a first redistribution layer formed only on the active surface and configured to be electrically coupled to the chip stacked assembly; a plurality of wire bonds, each of the plurality of wire bonds formed on a corresponding bonding pad, the plurality of wire bonds configured to electrically couple the plurality of chips; a plurality of metal pillars formed on the first redistribution layer and configured to electrically couple to the first redistribution layer; an encapsulation configured to encapsulate the chip stacked assembly, the plurality of wire bonds and the first redistribution layer, the encapsulation having a planar surface and a package bonding surface opposite to the planar surface; a second redistribution layer formed on the planar surface, and configured to electrically couple to the plurality of metal pillars; and a plurality of vertical interposers disposed in the encapsulation and configured to electrically couple to the second redistribution layer.