System And Method For Discovering Unknown Problematic Patterns In Chip Design Layout For Semiconductor Manufacturing

摘要

A system includes a critical signature library for storing critical signature databases of chip design layouts in semiconductor manufacturing and a statistical model creator for creating statistical models based on the known problematic circuit patterns stored in the critical signature databases and a target specification based on deviation between physical measurement and simulation data or design data associated with the known problematic circuit patterns. The system further has a statistical model based predictor for predicting and discovering unknown problematic circuit patterns by applying the statistical models to a large number of candidate circuit patterns generated from a random layout generator, or extracted from the chip design layout based on hot spot sites determined by extended lithographic process check on the chip design layout or inspecting wafers manufactured with the chip design layout with an aggressive sensitivity setting.

主权项

1. A system for discovering unknown problematic circuit patterns in a chip design layout of manufactured semiconductor devices, comprising:
a critical signature library constructed by configuring a storage device, said critical signature library having at least one critical signature database stored in said storage device, each critical signature database including a plurality of known problematic circuit patterns extracted from said chip design layout, each problematic circuit pattern having associated physical data measured from the manufactured semiconductor devices and simulation data generated based on said chip design layout; a statistical model creator interfacing with said critical signature library and creating at least one statistical model based on said plurality of known problematic circuit patterns according to a target specification based on deviation between the associated physical data and simulation data or design data, said at least one statistical model being saved in the corresponding critical signature database having said plurality of known problematic circuit patterns; a statistical model based predictor interfacing with said critical signature library, receiving a plurality of candidate circuit patterns, predicting and labeling each of said plurality of candidate circuit patterns as being problematic or not according to said at least one statistical model; wherein said statistical model predictor further saves each candidate circuit pattern labelled as being problematic in the corresponding critical signature database if the candidate circuit pattern labelled as being problematic does not match any of said plurality of known problematic circuit patterns in the corresponding critical signature database.