发明名称 FRINGE FIELD SWITCHING ARRAY SUBSTRATE AND PRODUCTION METHOD THEREOF AND DISPLAY APPARATUS
摘要 The present invention provides a method for producing a fringe field switching (FFS) array substrate, comprising: forming a gate electrode and a common electrode line on the array substrate; forming a gate electrode insulating layer; forming a layer of pixel electrode ITO; forming a semiconductor active layer; forming a source electrode and a drain electrode; forming an insulating protective layer and a via structure; forming a common electrode. The present invention further provides an FFS array substrate and a display apparatus, the display apparatus comprises the FFS array substrate above.
申请公布号 US2017031198(A1) 申请公布日期 2017.02.02
申请号 US201514896406 申请日期 2015.08.07
申请人 SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO. LTD. 发明人 XU Xiangyang
分类号 G02F1/1343;G02F1/1362;G02F1/1368;G02F1/1333;H01L27/12 主分类号 G02F1/1343
代理机构 代理人
主权项 1. A method for producing a fringe field switching (FFS) array substrate, comprising steps of: (1) forming a metal layer on an array substrate, and obtaining a gate electrode and a common electrode line by a patterning process; (2) forming a gate electrode insulating layer on the gate electrode and the common electrode line, the gate electrode insulating layer entirely covering the array substrate; (3) forming a layer of pixel electrode ITO on the gate electrode insulating layer between the gate electrode and the common electrode line; (4) forming a semiconductor active layer on a location of the gate electrode insulating layer corresponding to the gate electrode, and a cross-sectional width of the semiconductor active layer being less than a cross-sectional width of the gate electrode; (5) forming a source electrode and a drain electrode on the semiconductor active layer and the gate electrode insulating layer, and the drain electrode overlapping and contacting a portion of the pixel electrode ITO and the drain electrode electrode being on the pixel electrode ITO; (6) forming an insulating protective layer on the source electrode, the drain electrode, the semiconductor active layer, the pixel electrode ITO and the gate electrode insulating layer, and forming a via structure on the gate electrode insulating layer and the insulating protective layer on the common electrode line, and a cross-sectional width of the via structure being less than a cross-sectional width of the common electrode line; (7) forming a common electrode on the insulating protective layer and the via structure corresponding to the pixel electrode ITO.
地址 Shenzhen, Guangdong CN