| 发明名称 |
SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF OPERATING A BIT LINE SENSE AMPLIFIER OF THE SAME |
| 摘要 |
A semiconductor memory device includes a plurality of memory cells, a plurality of word lines and a plurality of bit lines, wherein each memory cell is coupled to a respective word line and bit line. The semiconductor memory device includes a plurality of sense amplifiers, wherein each sense amplifier is coupled to two bit lines. The semiconductor memory device is configured to receive a first positive supply voltage, a second positive supply voltage, and a negative supply voltage, and determine a low level of an amplified voltage based on the negative supply voltage in an operation of amplifying data in a memory cell. |
| 申请公布号 |
US2017032831(A1) |
申请公布日期 |
2017.02.02 |
| 申请号 |
US201615175550 |
申请日期 |
2016.06.07 |
| 申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YU SEONG-HEON;CHOI JONGHYUN;SOHN DONGWOO;OH Kl-SEOK |
| 分类号 |
G11C7/12;G11C5/14;G11C7/06 |
主分类号 |
G11C7/12 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor memory device, comprising:
a plurality of memory cells, a plurality of word lines and a plurality of bit lines, wherein each memory cell is coupled to a respective word line and bit line; and a plurality of sense amplifiers, wherein each sense amplifier is coupled to two bit lines, wherein the semiconductor memory device is configured to receive a first positive supply voltage, a second positive supply voltage, and a negative supply voltage, and determine a low level of an amplified voltage based on the negative supply voltage in an operation of amplifying data in a memory cell. |
| 地址 |
SUWON-SI KR |
