发明名称 |
Multi-Chip Packages with Multi-Fan-Out Scheme and Methods of Manufacturing the Same. |
摘要 |
A package may include a first chip having a first surface and a second surface opposite the first surface; a first redistribution line (RDL) coupled to the first surface of the first chip; a second chip having a first surface and a second surface opposite the first surface, the first surface of the second chip facing the first chip; a second RDL disposed between the first chip and the second chip and coupled to the first surface of the second chip; a conductive via laterally adjacent to the second chip, the conductive via coupled to the second RDL; and a molding compound disposed between the second chip and the conductive via. |
申请公布号 |
US2017033080(A1) |
申请公布日期 |
2017.02.02 |
申请号 |
US201514815055 |
申请日期 |
2015.07.31 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Chen Hsien-Wei;Chen Jie |
分类号 |
H01L25/065;H01L23/31;H01L21/56;H01L23/367;H01L25/00 |
主分类号 |
H01L25/065 |
代理机构 |
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代理人 |
|
主权项 |
1. A package, comprising:
a first chip having a first surface and a second surface opposite the first surface; a first redistribution line (RDL) coupled to the first surface of the first chip; a second chip having a first surface and a second surface opposite the first surface, the first surface of the second chip facing the first chip; a second RDL disposed between the first chip and the second chip and coupled to the first surface of the second chip; a first adhesive layer disposed between the first chip and the second RDL, the first adhesive layer extending continuously along the second surface of the first chip; a conductive via laterally adjacent to the second chip, the conductive via coupled to the second RDL; a molding compound disposed between the second chip and the conductive via; a third chip laterally separated from the second chip, the third chip coupled to the second RDL, the third chip having a first surface and a second surface opposite the first surface, the first surface of the third chip facing the first chip; and a second adhesive layer disposed at the second surface of the second chip and at the second surface of the third chip, the second adhesive layer extending continuously between opposite ends of the second chip and the third chip. |
地址 |
Hsin-Chu TW |