发明名称 |
NONVOLATILE MEMORY DEVICE DETECTING DEFECTIVE BIT LINE AT HIGH SPEED AND TEST SYSTEM THEREOF |
摘要 |
A nonvolatile memory device includes a memory cell array, a page buffer connected to bit lines of the memory cell array, a defect detector, and an input/output circuit. The defect detector receives readout data from the page buffer through the bit lines and performs a logical operation based on the readout data for a plurality of column units. The defect detector outputs defective data based on the logical operation. The input/output circuit outputs the defective data based on a control signal. |
申请公布号 |
US2017032849(A1) |
申请公布日期 |
2017.02.02 |
申请号 |
US201615222244 |
申请日期 |
2016.07.28 |
申请人 |
PARK Sang-In |
发明人 |
PARK Sang-In |
分类号 |
G11C29/26;G11C7/10;G11C8/10 |
主分类号 |
G11C29/26 |
代理机构 |
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代理人 |
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主权项 |
1. A nonvolatile memory device, comprising:
a memory cell array; a page buffer connected to bit lines of the memory cell array; a defect detector to receive readout data from the page buffer through the bit lines and to perform a logical operation based on the readout data for a plurality of column units and to output defective data based on the logical operation; and an input/output circuit to output the defective data based on a control signal. |
地址 |
Anyang-si KR |