发明名称 OPERATIONAL AMPLIFYING CIRCUIT AND LIQUID CRYSTAL PANEL DRIVE DEVICE USING THE SAME
摘要 An operational amplifier circuit includes: a first differential amplifier section containing a P-type differential pair of P-type transistors; a second differential amplifier section containing an N-type differential pair of N-type transistors; an intermediate stage connected with outputs of the first and second differential amplifier sections and containing a first current mirror circuit of P-type transistors, and a second current mirror circuit of N-type transistors; and an output stage configured to amplify an output of the intermediate stage in power. The first differential amplifier section includes a first current source and a first capacitance between sources of the P-type transistors of the P-type differential pair and a positive side power supply voltage. The second differential amplifier section includes a second current source and a second capacitance between sources of the N-type transistors of the N-type differential pair and a negative side power supply voltage.
申请公布号 US2017032760(A1) 申请公布日期 2017.02.02
申请号 US201615291554 申请日期 2016.10.12
申请人 RENESAS ELECTRONICS CORPORATION 发明人 SHIMOMAKI Kenji
分类号 G09G3/36;G09G3/20;H03F3/45 主分类号 G09G3/36
代理机构 代理人
主权项 1. A liquid crystal driver circuit comprising: a buffer circuit in which an operational amplifier circuit is connected as a voltage follower; and a gray-scale voltage generating circuit configured to generate a gray-scale voltage based on an input signal to output to said buffer circuit, wherein said operational amplifier circuit comprises: a first differential amplifier section comprising a P-type differential pair of P-type transistors; a second differential amplifier section comprising an N-type differential pair of N-type transistors; an intermediate stage connected with outputs of said first and second differential amplifier sections and comprising a first current mirror circuit of P-type transistors, and a second current mirror circuit of N-type transistors; and an output stage configured to amplify a power of an output of said intermediate stage, wherein said first differential amplifier section comprises a first current source and a first capacitor between sources of said P-type transistors of said P-type differential pair and a positive side power supply voltage, and wherein said second differential amplifier section comprises a second current source and a second capacitor between sources of said N-type transistors of said N-type differential pair and a negative side power supply voltage.
地址 Tokyo JP