发明名称 A SOC DESIGN WITH CRITICAL TECHNOLOGY PITCH ALIGNMENT
摘要 An SOC apparatus includes a plurality of gate interconnects with a minimum pitch g, a plurality of metal interconnects with a minimum pitch m, and a plurality of vias interconnecting the gate interconnects and the metal interconnects. The vias have a minimum pitch v. The values m, g, and v are such that g2+m2≧v2 and an LCM of g and m is less than 20 g. The SOC apparatus may further include a second plurality of metal interconnects with a minimum pitch of m2, where m2>m and the LCM of g, m, and m2 is less than 20 g.
申请公布号 EP3025370(B1) 申请公布日期 2017.02.01
申请号 EP20140758188 申请日期 2014.07.23
申请人 Qualcomm Incorporated 发明人 CHEN, Xiangdong;KWON, Ohsang;TERZIOGLU, Esin;BUNNALIM, Hadi
分类号 H01L27/02;H01L21/768;H01L23/498;H01L23/522;H01L23/528 主分类号 H01L27/02
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