发明名称 電源回路、半導体装置及び電子機器
摘要 PROBLEM TO BE SOLVED: To provide a power supply circuit capable of suppressing an increase in power consumption and the deterioration of the accuracy of power supply voltage; and a semiconductor device and electronic apparatus that include the power supply circuit.SOLUTION: A reference voltage generation unit 401, which generates a reference voltage VIN under a first voltage VDD generated by a first power supply, and a regulator unit 402, which generates a power supply voltage VRG having a voltage value that corresponds to the reference voltage VIN under a second voltage VDP generated by a second power supply, are powered down according to a power-down signal PDN. That is, the reference voltage generation unit 401 is powered down according to the power-down signal PDN having the first voltage VDD; and the regulator unit 402 is powered down according to a level-shift power-down signal PPD that is obtained by shifting the level of the voltage value of the power-down signal PDN to a second voltage VDP.
申请公布号 JP6071531(B2) 申请公布日期 2017.02.01
申请号 JP20120281111 申请日期 2012.12.25
申请人 ラピスセミコンダクタ株式会社 发明人 丸山 哲史
分类号 G05F1/56 主分类号 G05F1/56
代理机构 代理人
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