| 摘要 |
An integrated circuit includes multiple blocks of circuitry 4, 6, 8 communicating signals via an interface 10 controlled by a clock signal. One or more clock meshes 20, 22 is used on at least one side of the interface driven by one or more clock drivers 24, 26 that drive the clock mesh with the clock signal communicated with a further block of circuitry. A plurality of interface storage circuits (flip-flops) 12, 14, 16, 18 are coupled to the clock mesh and receive the clock signal from the clock mesh to control storage therein. Also claimed is a signal value storage circuit comprises signal inputs and outputs and processing circuitry to capture and store a stored data value dependent on the input signal in response to detecting a predetermined characteristic of clock signals. |
