A level shifter circuit has a plurality of channels for providing signals to a capacitive load and has circuits for sharing charge stored in the capacitive load between the channels. A first pair of channel clock generating circuits are coupled respectively to a first pair of channels. A second pair of channel clock generating circuits are coupled respectively to a second pair of channels. A pair of switches couple the first pair of channels together and the second pair of channels together, respectively, for sharing charge between the channels. A single resistor is coupled in circuit with all of the channels for controlling a slope of charge sharing between channels.
申请公布号
EP3005341(A4)
申请公布日期
2017.02.01
申请号
EP20140800939
申请日期
2014.05.27
申请人
Texas Instruments Incorporated;Texas Instruments Deutschland GmbH
发明人
REITHMAIER, Stefan, A.;BERNARD, Josy;STOERK, Carsten, I.;GUIBOURG, Nicolas, M.