Fabricating transistors having resurfaced source/drain regions with stressed portions

摘要

Methods are providing for fabricating transistors having at least one source region or drain region with a stressed portion. The methods include: forming, within a cavity of a substrate structure, the at least one source region or drain region with the internal stress; and resurfacing the at least one source region or drain region to reduce surface defects of the at least one source region or drain region without relaxing the stressed portion thereof. For instance, the resurfacing can include melting an upper portion of the at least one source region or drain region. In addition, the resurfacing can include re-crystallizing an upper portion of the at least one source region or drain region, and/or providing the at least one source region or drain region with at least one {111} surface.

主权项

1. A method comprising:
fabricating a transistor over a substrate structure, the transistor comprising at least one of a source region or a drain region, wherein the at least one source region or drain region comprises a stressed portion, and the fabricating comprises: forming, within a cavity of the substrate structure, the at least one source region or drain region including the stressed portion thereof, wherein the forming comprises growing, epitaxially, the at least one source region or drain region within the cavity of the substrate structure; and resurfacing the at least one source region or drain region to reduce surface defects of the at least one source region or drain region without relaxing the stressed portion thereof; wherein resurfacing comprises providing the at least on source region or drain region with at least one {111} surface.